Integrated circuit packages of the ball grid array (BGA) type are well known. Conventional BGA packages provide a rectangular or square array of connections on the underside of a multi-layer substrate, utilizing a solder ball located at each connector location. The BGA package is attached to a printed circuit board by reflowing the solder balls to make connection to conductors at the surface of the printed circuit board. The BGA package provides the important advantage of being self-aligning, as the surface tension of the solder will tend to pull the BGA package into proper alignment with the corresponding conductors on the printed circuit board.
There are many benefits to using the BGA package, however its greatest asset—the ability to provide an extremely dense array of thousands of pads—also turns out to be a tremendous problem for designers. The increasing number of pads and decreasing pitch (the center-to-center distance between pads) of the BGA array pattern has outpaced the ability to effectively design these devices. Maintaining signal integrity at high levels and reducing fabrication costs are two important requirements that are at odds with each other. Reducing crosstalk is generally accomplished by increasing the space between conductors, which can increase layer count, increase package size, and thus, fabrication cost. Routing the signal traces on dense BGA packages requires more stringent design rules and more layers in the substrate. Fine pitch high pad count BGAs have thus become difficult, if not impossible to route. If the BGA package has too many pads in a dense array, the only way to minimize the number of layers in the substrate is to utilize all the available space with a pattern of fanouts and traces. Routing the device without an effective pattern wastes space, increases the package size, and requires more layers in the substrate, all undesirable outcomes. Medium to low pad count devices do not present a significant problem, and can be routed using conventional technology, but high pad count devices with a pitch less than 0.8 millimeter require a new paradigm for routing the traces out of the array. Without this, layer count becomes excessive, adversely affecting the fabrication cost and reliability of the BGA.
Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention. In addition, dashed lines and some numbers are added in FIGS. 2 and 3 to aid in understanding the invention.